Semiconductor memory device including a first electrode to input command set and output read data and a second electrode to supply power

Abstract

A semiconductor memory device includes: a memory cell array; a peripheral circuit connected to this memory cell array, the peripheral circuit outputting data in the memory cell array as a read data in response to input of a command set, the command set including a first command, address data, and a second command; a first electrode capable of being used in input of the command set and output of the read data; and a second electrode capable of supplying electric power to the peripheral circuit. A current flowing in the second electrode at a second timing is larger than a current flowing in the second electrode at a first timing, the first timing being a timing at which the first command is inputted, the second timing being a timing before which the input of the address data is started and after which an input of the second command is finished.