The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 22, 2022

Filed:

Jun. 18, 2020
Applicant:

Stmicroelectronics S.r.l., Agrate Brianza, IT;

Inventors:

Davide Manfre′, Pandino, IT;

Laura Capecchi, Vedano al Lambro, IT;

Marcella Carissimi, Treviolo, IT;

Marco Pasotti, Travaco′ Siccomario, IT;

Assignee:

STMICROELECTRONICS S.R.L., Agrate Brianza, IT;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 13/00 (2006.01);
U.S. Cl.
CPC ...
G11C 13/004 (2013.01); G11C 13/0004 (2013.01); G11C 13/0026 (2013.01); G11C 13/0038 (2013.01); G11C 2013/005 (2013.01);
Abstract

A non-volatile memory device includes a memory array, a reading circuit, a column decoder stage, and a read supply voltage generator. The column decoder stage includes selectable bitlines and selection switches. A read supply voltage generator includes a voltage regulation circuit and a dummy column decoder coupled to an output of the voltage regulation circuit and having electrical characteristics correlated to the selected read path. The voltage regulation circuit is configured to receive a first electrical quantity correlated to a desired voltage value on the selected bitline and a second electrical quantity correlated to a desired current value for the selected bitline and to generate a regulated read supply voltage for the column decoder stage.


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