The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 22, 2022

Filed:

Aug. 18, 2020
Applicant:

Ultrata, Llc, Vienna, VA (US);

Inventors:

Steven J. Frank, Boulder, CO (US);

Larry Reback, Vienna, VA (US);

Assignee:

Ultrata, LLC, Vienna, VA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 3/06 (2006.01); G06F 11/00 (2006.01); G06F 12/0815 (2016.01); G06F 11/30 (2006.01); G06F 11/34 (2006.01); G06F 12/04 (2006.01); G06F 12/02 (2006.01); G06F 11/14 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0619 (2013.01); G06F 3/061 (2013.01); G06F 3/065 (2013.01); G06F 3/067 (2013.01); G06F 3/0608 (2013.01); G06F 3/0649 (2013.01); G06F 3/0667 (2013.01); G06F 11/00 (2013.01); G06F 11/14 (2013.01); G06F 11/3034 (2013.01); G06F 11/3037 (2013.01); G06F 11/3485 (2013.01); G06F 12/0223 (2013.01); G06F 12/04 (2013.01); G06F 12/0815 (2013.01);
Abstract

According to one embodiment, a hardware-based processing node of a plurality of hardware-based processing nodes in an object memory fabric can comprise a memory module storing and managing a plurality of memory objects in a hierarchy of the object memory fabric. Each memory object can be created natively within the memory module, accessed using a single memory reference instruction without Input/Output (I/O) instructions, and managed by the memory module at a single memory layer. The object memory fabric can utilize a memory fabric protocol between the hardware-based processing node and one or more other nodes of the plurality of hardware-based processing nodes to distribute and track the memory objects across the object memory fabric. The memory fabric protocol can be utilized across a dedicated link or across a shared link between the hardware-based processing node and one or more other nodes of the plurality of hardware-based processing nodes.


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