The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 15, 2022

Filed:

Jan. 28, 2021
Applicant:

Nxp B.v., Eindhoven, NL;

Inventors:

Saurabh Goyal, Sonipat, IN;

Divya Tripathi, Noida, IN;

Sanjay Kumar Wadhwa, Noida, IN;

Assignee:

NXP B.V., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 17/687 (2006.01); H03K 19/00 (2006.01); H03K 19/0175 (2006.01); H03K 19/0185 (2006.01); H03K 3/356 (2006.01); H03K 19/003 (2006.01); H03K 17/10 (2006.01);
U.S. Cl.
CPC ...
H03K 3/356113 (2013.01); H03K 17/102 (2013.01); H03K 19/00315 (2013.01); H03K 19/018521 (2013.01);
Abstract

A level shifter includes a pull-down circuit, a pull-up circuit, a protection circuit, and an output generator. The pull-down circuit is configured to receive input voltages, and generate bias voltages. The input voltages are associated with a voltage domain. The pull-up circuit is configured to receive a supply voltage and generate control voltages. The protection circuit is configured to receive reference voltages, and control the generation of the bias voltages and the control voltages. The output generator is configured to receive at least one of the reference voltages, and at least one of the bias voltages and the control voltages, and generate output voltages that are able to reach minimum and maximum voltage levels of another voltage domain. Further, the output voltages remain unaffected by variations in process, voltage, and temperature.


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