The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 15, 2022

Filed:

Jan. 21, 2019
Applicant:

Novatek Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Jin-Yi Lin, Kaohsiung, TW;

Chieh-An Lin, Taipei, TW;

Jhih-Siou Cheng, New Taipei, TW;

Ju-Lin Huang, Hsinchu County, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01); G09G 3/3225 (2016.01); G11C 27/02 (2006.01); H03F 3/45 (2006.01); H03K 3/356 (2006.01);
U.S. Cl.
CPC ...
G09G 3/3225 (2013.01); G11C 27/026 (2013.01); H03F 3/45179 (2013.01); H03K 3/356113 (2013.01); G09G 2310/0289 (2013.01); G09G 2310/0291 (2013.01); G09G 2310/0294 (2013.01); G09G 2320/029 (2013.01); G09G 2320/0233 (2013.01); G09G 2320/043 (2013.01); G09G 2330/12 (2013.01); H03F 2203/45156 (2013.01); H03F 2203/45461 (2013.01);
Abstract

A sensing circuit for an organic light-emitting diode driver includes a sample and hold circuit and a gain amplifier. The sample and hold circuit is configured to sample a sensing signal received via an input terminal. The gain amplifier is coupled to the sample and hold circuit. The sample and hold circuit includes a first capacitor, a second capacitor, a first switch, a second switch, a third switch and a fourth switch. The first capacitor is coupled between the input terminal and the gain amplifier. The second capacitor is coupled between a reference terminal and the gain amplifier. The first switch is connected between the first capacitor and the input terminal. The second switch is connected between the second capacitor and the reference terminal. The third switch is connected between the first capacitor and the gain amplifier. The fourth switch is connected between the second capacitor and the gain amplifier.


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