The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 15, 2022

Filed:

Dec. 30, 2019
Applicant:

Ali Tasdighi Far, San Jose, CA (US);

Inventor:

Ali Tasdighi Far, San Jose, CA (US);

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06G 7/163 (2006.01); G06G 7/164 (2006.01); G06N 3/063 (2006.01); G05F 3/26 (2006.01); H03F 3/45 (2006.01); H03G 1/00 (2006.01); H03M 1/74 (2006.01); H03M 1/12 (2006.01);
U.S. Cl.
CPC ...
G06G 7/163 (2013.01); G05F 3/262 (2013.01); G06G 7/164 (2013.01); G06N 3/063 (2013.01); H03F 3/45273 (2013.01); H03F 3/45475 (2013.01); H03G 1/0023 (2013.01); H03M 1/1245 (2013.01); H03M 1/745 (2013.01);
Abstract

Analog multipliers can perform signal processing with approximate precision asynchronously (clock free) and with low power consumptions, which can be advantageous including in emerging mobile and portable artificial intelligence (AI) and machine learning (ML) applications near or at the edge and or near sensors. Based on low cost, mainstream, and purely digital Complementary-Metal-Oxide-Semiconductor (CMOS) manufacturing process, the present invention discloses embodiments of current-mode analog multipliers that can be utilized in multiply-accumulate (MAC) signal processing in end-application that require low cost, low power consumption, (clock free) and asynchronous operations.


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