The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 08, 2022

Filed:

Oct. 07, 2019
Applicant:

Alpha and Omega Semiconductor (Cayman) Ltd., Grand Cayman, KY;

Inventors:

Bum-Seok Suh, Gyeonggi-do, KR;

Wonjin Cho, Gyeonggi-Do, KR;

Son Tran, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 17/082 (2006.01); H02H 9/04 (2006.01); H02H 6/00 (2006.01); H03K 17/18 (2006.01); H05B 6/06 (2006.01); H03K 17/16 (2006.01); H02H 3/20 (2006.01); H02H 5/04 (2006.01); H02H 3/08 (2006.01); H02H 3/24 (2006.01);
U.S. Cl.
CPC ...
H03K 17/0828 (2013.01); H02H 6/00 (2013.01); H02H 9/04 (2013.01); H03K 17/164 (2013.01); H03K 17/168 (2013.01); H03K 17/18 (2013.01); H05B 6/062 (2013.01); H02H 3/08 (2013.01); H02H 3/20 (2013.01); H02H 3/207 (2013.01); H02H 3/24 (2013.01); H02H 5/04 (2013.01); H02H 9/041 (2013.01);
Abstract

A method of generating a gate drive signal for driving a control terminal of a power switch includes detecting a system input signal; determining a signal pulse of the system input signal being a first signal pulse following a power up event, or following an idle period, or following removal of a fault condition; and in response, generating a soft gate drive signal to drive the control terminal of the power switch to softly turn on the power switch. In another embodiment, the method includes determining a duration of the on period of the system input signal exceeding a maximum on duration and in response, disabling the gate drive signal to turn off the power switch; and determining a deassertion transition of the system input signal and in response, blocking the system input signal from the gate drive signal for a minimum off duration.


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