The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 08, 2022

Filed:

Sep. 13, 2019
Applicant:

Hitachi Astemo, Ltd., Hitachinaka, JP;

Inventors:

Akeo Satoh, Hitachinaka, JP;

Akira Kotabe, Hitachinaka, JP;

Tatsuo Nakagawa, Tokyo, JP;

Assignee:

Hitachi Astemo, Ltd., Hitachinaka, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03B 1/00 (2006.01); H03K 3/00 (2006.01); H03K 5/1252 (2006.01); H03K 17/687 (2006.01);
U.S. Cl.
CPC ...
H03K 5/1252 (2013.01); H03K 17/6872 (2013.01);
Abstract

To prevent an output of an intermediate potential by suppressing sneaking of a current from a signal line to a power line at the time of disconnection of a power supply. A control circuit which receives a power supply voltage from a power line Land outputs an output signal to a signal line Lincludes: a load Rwhich is provided between the power line and the signal line; a first transistor Pwhich is provided between the load and the signal line; a second transistor Pwhich is provided between a well of the first transistor and the power line; and a gate control circuitwhich connects a gate terminal of the first transistor and a gate terminal of the second transistor to the signal line and turns off the first transistor and the second transistor, at the time of disconnection of a power supply.


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