The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 08, 2022

Filed:

Apr. 27, 2021
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Marcel A. Kossel, Reichenburg, CH;

Pier Andrea Francese, Adliswil, CH;

Mridula Prathapan, Adliswil, CH;

Abdullah Serdar Yonar, Zurich, CH;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/037 (2006.01); H03L 7/08 (2006.01); G06F 1/32 (2019.01);
U.S. Cl.
CPC ...
H03K 3/037 (2013.01); H03L 7/08 (2013.01); G06F 1/32 (2013.01);
Abstract

A synchronous divider circuit with time-synchronized outputs. The synchronous divider circuit includes a plurality of divider stages including each a D-flip-flop circuit and a respective retiming flip-flop circuit, wherein an output terminal of the retiming flip-flop circuit of a current divider stage is connected to an input of the D-flip-flop circuit of a next divider stage, and wherein the current divider stage includes an additional retiming flip-flop circuit, wherein the output terminal of the retiming flip-flop circuit of the current divider stage is connected to an input terminal of the additional retiming flip-flop circuit of the current divider stage, so that an output signal of the additional retiming flip-flop circuit of the current divider stage and an output terminal of the retiming flip-flop circuit of the next divider stage are time-synchronized with respect to each other.


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