The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 08, 2022

Filed:

Nov. 05, 2019
Applicants:

Hefei Xinsheng Optoelectronics Technology Co., Ltd., Anhui, CN;

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Meng Li, Beijing, CN;

Yongqian Li, Beijing, CN;

Song Meng, Beijing, CN;

Zhidong Yuan, Beijing, CN;

Can Yuan, Beijing, CN;

Haixia Xu, Beijing, CN;

Wenchao Bao, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/038 (2013.01); G09G 3/3258 (2016.01);
U.S. Cl.
CPC ...
G09G 3/3258 (2013.01); G09G 2300/0426 (2013.01); G09G 2300/0439 (2013.01); G09G 2300/0819 (2013.01); G09G 2310/0202 (2013.01); G09G 2310/0264 (2013.01);
Abstract

A pixel unit includes a first sub-pixel circuit and a second sub-pixel circuit. The first sub-pixel circuit includes a first sub-pixel driving circuit and a first light-emitting element, and the second sub-pixel circuit includes a second sub-pixel driving circuit and a second light-emitting element. The first sub-pixel driving circuit and the second sub-pixel driving circuit are connected to a first data line, and the first sub-pixel driving circuit is connected to a first gate line, the second sub-pixel driving circuit is connected to the second gate line. The first sub-pixel driving circuit is configured to drive the first light-emitting element by a data voltage on the first data line under the control of the first gate line. The second sub-pixel driving circuit is configured to drive the second light-emitting element by the data voltage on the first data line under the control of the second gate line.


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