The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 08, 2022

Filed:

Feb. 13, 2020
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Christoph Raisch, Gerlingen, DE;

Marco Kraemer, Sindelfingen, DE;

Donald William Schmidt, Stone Ridge, NY (US);

Bernd Nerz, Boeblingen, DE;

Peter Dana Driever, Poughkeepsie, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/24 (2006.01); G06F 9/455 (2018.01); G06F 9/48 (2006.01); G06F 9/50 (2006.01); G06F 12/1081 (2016.01);
U.S. Cl.
CPC ...
G06F 13/24 (2013.01); G06F 9/45554 (2013.01); G06F 9/4812 (2013.01); G06F 9/5077 (2013.01); G06F 12/1081 (2013.01);
Abstract

An interrupt signal is provided to a first guest operating system. A bus attachment device receives an interrupt signal from a bus connected module with an interrupt target ID identifying a processor assigned for use by the guest operating system as a target processor for handling the interrupt signal. The bus attachment device translates the received interrupt target ID to a logical processor ID of the target processor using an interrupt table entry stored in a memory section assigned to a second guest operating system hosting the first operating system and forwards the interrupt signal to the target processor for handling. The logical processor ID of the target processor is used to address the target processor directly.


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