The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 01, 2022
Filed:
Nov. 25, 2020
Applicants:
The Trustees of Indiana University, Indianapolis, IN (US);
The United States of America, As Represented BY the Secretary of the Navy, Arlington, VA (US);
Inventors:
Andrew Lukefahr, Bloomington, IN (US);
Adam Duncan, Bloomington, IN (US);
Assignee:
Other;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/173 (2006.01); H03K 19/1776 (2020.01); H03K 19/17704 (2020.01); H03K 19/17728 (2020.01);
U.S. Cl.
CPC ...
H03K 19/1776 (2013.01); H03K 19/17708 (2013.01); H03K 19/17728 (2013.01);
Abstract
A field-programmable gate array (FPGA) architecture capable of performing immutable hardware Root-of-Trust updates and patches. In embodiments, the architecture utilizes the dielectric breakdown mechanism of magneto tunnel junctions (MTJ) to operate both as: 1) multi-time programmable (MTP) configuration memory for reconfigurable FPGA designs, and 2) one-time programmable (OTP) memory for FPGA Root-of-Trust sections.