The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 01, 2022

Filed:

Jun. 19, 2018
Applicant:

Rohm Co., Ltd., Kyoto, JP;

Inventors:

Masatoshi Aketa, Kyoto, JP;

Kazunori Fuji, Kyoto, JP;

Assignee:

ROHM CO., LTD., Kyoto, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/78 (2006.01); B23K 26/53 (2014.01); H01L 21/304 (2006.01); H01L 21/306 (2006.01); H01L 21/683 (2006.01); H01L 23/544 (2006.01);
U.S. Cl.
CPC ...
H01L 21/7813 (2013.01); B23K 26/53 (2015.10); H01L 21/304 (2013.01); H01L 21/30625 (2013.01); H01L 21/6835 (2013.01); H01L 23/544 (2013.01); H01L 2221/6835 (2013.01); H01L 2221/68345 (2013.01);
Abstract

A method for manufacturing a semiconductor device includes a step of preparing a semiconductor wafer source which includes a first main surface on one side, a second main surface on the other side and a side wall connecting the first main surface and the second main surface, an element forming step of setting a plurality of element forming regions on the first main surface of the semiconductor wafer source, and forming a semiconductor element at each of the plurality of element forming regions, and a wafer source separating step of cutting the semiconductor wafer source from a thickness direction intermediate portion along a horizontal direction parallel to the first main surface, and separating the semiconductor wafer source into an element formation wafer and an element non-formation wafer after the element forming step.


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