The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 22, 2022
Filed:
Nov. 22, 2019
Applicant:
L. Pierre DE Rochemont, Raleigh, NC (US);
Inventor:
L. Pierre de Rochemont, Raleigh, NC (US);
Assignee:
Other;
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/532 (2006.01); H01L 23/64 (2006.01); H01L 25/065 (2006.01); H01G 4/12 (2006.01); H01L 23/66 (2006.01); H01G 4/30 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5329 (2013.01); H01G 4/1209 (2013.01); H01G 4/1272 (2013.01); H01L 23/642 (2013.01); H01L 23/66 (2013.01); H01L 25/0657 (2013.01); H01G 4/30 (2013.01); H01L 2223/6655 (2013.01); H01L 2223/6666 (2013.01); H01L 2223/6677 (2013.01);
Abstract
The present invention ultra-low loss high energy density dielectric layers having femtosecond (10sec) polarization response times within a chip stack assembly to extend impedance-matched electrical lengths and mitigate ringing within the chip stack to bring the operational clock speed of the stacked system closer to the intrinsic clock speed(s) of the semiconductor die bonded within chip stack.