The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 15, 2022

Filed:

Nov. 10, 2020
Applicant:

Nxp B.v., San Jose, CA (US);

Inventors:

Marcin Grad, Bemmel, NL;

Paul Hendrik Cappon, Wijchen, NL;

Kiran B. Gopal, Bangalore, IN;

Taede Smedes, Beuningen, NL;

Assignee:

NXP B.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 3/356 (2006.01); H01L 27/02 (2006.01); H03K 19/0185 (2006.01);
U.S. Cl.
CPC ...
H03K 3/356113 (2013.01); H01L 27/0248 (2013.01); H03K 3/356182 (2013.01); H03K 19/018528 (2013.01);
Abstract

As disclosed herein, a level shift circuit includes devices that are responsive to an ESD signal for placing those devices in a specific condition in response to the ESD signal indicating an ESD event. In some embodiments, the devices are transistors in current paths that are placed in a condition such that during an ESD event, voltage differentials in the current paths across voltage domain boundaries do not damage the circuitry of the level shift circuit. In some embodiments, some of the same devices that are responsive to the ESD event are also responsive to a signal to that detects the absence of a power supply voltage of one of the domains and places those devices in a condition to disable the level shift circuit if the power supply voltage is not present.


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