The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 15, 2022

Filed:

Nov. 01, 2016
Applicant:

Csem Centre Suisse D'electronique ET DE Microtechnique Sa—recherche ET Developpement, Neuchâtel, CH;

Inventors:

Bertrand Paviet-Salomon, Neuchâtel, CH;

Andrea Tomasi, Neuchâtel, CH;

Matthieu Despeisse, Neuchâtel, CH;

Christophe Ballif, Neuchâtel, CH;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/0747 (2012.01); H01L 31/0745 (2012.01); H01L 31/18 (2006.01); H01L 31/20 (2006.01);
U.S. Cl.
CPC ...
H01L 31/0747 (2013.01); H01L 31/0745 (2013.01); H01L 31/1804 (2013.01); H01L 31/202 (2013.01); Y02E 10/547 (2013.01); Y02P 70/50 (2015.11);
Abstract

A photovoltaic device is proposed comprising a silicon-based substrate () having a p-type or n-type doping, with an intrinsic buffer layer () situated on said substrate. A first silicon layer () of a first doping type is situated on predetermined regions () of the intrinsic buffer layer. The first layer has interstices () between said predetermined regions (). The first silicon layer comprises at least partially a microcrystalline layer at its side away from the substrate. A microcrystalline silicon layer () of a second doping type is situated on said first silicon layer (). A third silicon layer () of the second doping type is situated on said intrinsic buffer layer at the interstices, the third silicon layer being amorphous at its side facing said silicon-based substrate and comprising an at least partially microcrystalline layer portion to the side away from the intrinsic buffer layer.


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