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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11251143 B1

PDFFull Text
Date of Patent:
Feb. 15, 2022

Filed:

Sep. 17, 2019

Semiconductor device and method of manufacturing the same

Applicant:

Sumitomo Electric Industries, Ltd., Osaka, JP;

Inventors:

Masataka Watanabe, Osaka, JP;

Naoya Kono, Osaka, JP;

Takehiko Kikuchi, Osaka, JP;

Assignee:

SUMITOMO ELECTRIC INDUSTRIES, LTD., Osaka, JP;

Attorney:

Smith, Gambrell & Russell, LLP.

Primary Examiner:

Moin M Rahman

Assistant Examiner:

Mohammad A Rahman

Int. Cl.
CPC ...
H01L 23/00 (2006.01); G02F 1/225 (2006.01); G02F 1/21 (2006.01);
U.S. Cl.
CPC ...
H01L 24/05 (2013.01); G02F 1/225 (2013.01); H01L 24/03 (2013.01); G02F 1/212 (2021.01); H01L 2224/0346 (2013.01); H01L 2224/05083 (2013.01); H01L 2224/05144 (2013.01); H01L 2224/05166 (2013.01); H01L 2224/05169 (2013.01); H01L 2224/05184 (2013.01); H01L 2924/3512 (2013.01);
Abstract

A semiconductor device includes: a semiconductor layer formed on a substrate; a first resin layer formed on the semiconductor layer; a second resin layer formed on the first resin layer; a first wiring layer that is formed on the semiconductor layer and is buried in the second resin layer; a second wiring layer that is formed on the second resin layer and the first wiring layer, and is electrically connected to the first wiring layer; and a first inorganic insulating film covering the second resin layer and the second wiring layer, wherein an area of the first wiring layer is larger than an area of the second wiring layer.

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Watanabe, Masataka. (2022). Semiconductor device and method of manufacturing the same (U.S. Patent No. 11251143). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11251143

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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