The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 15, 2022
Filed:
Oct. 25, 2018
Osram Oled Gmbh, Regensburg, DE;
Thomas Schwarz, Regensburg, DE;
Lutz Höppel, Alteglofsheim, DE;
Thorsten Frank Baumheinrich, Altdorf, DE;
Jens Richter, Hemau, DE;
OSRAM OLED GMBH, Regensburg, DE;
Abstract
The method of manufacturing a plurality of semiconductor chips () comprises a step A) of providing a semiconductor substrate () having a plurality of integrated electronic circuits () on a top side () thereof. In a step B), a sacrificial layer () is applied on one side of the semiconductor substrate. In a step C), holes () are introduced in the sacrificial layer so that at least one hole is formed above each electronic circuit. In a step D), the semiconductor substrate is adhered to a carrier () with the sacrificial layer at the front, an adhesive layer () being used between the sacrificial layer and the carrier, and the adhesive layer filling the holes so that holding elements () from the adhesive layer are formed in the holes. In a step E) the semiconductor substrate is thinned. In a step F) separation trenches () are introduced between the electronic circuits, which extend from a side of the electronic circuits facing away from the carrier to the sacrificial layer and penetrate the thinned semiconductor substrate. In a step G) the sacrificial layer is removed in the region between the electronic circuits and the carrier.