The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 08, 2022

Filed:

Dec. 27, 2019
Applicant:

Sandisk Technologies Llc, Addison, TX (US);

Inventors:

Ashish Baraskar, Santa Clara, CA (US);

Henry Chin, San Jose, CA (US);

Ching-Huang Lu, San Jose, CA (US);

Assignee:

SanDisk Technologies LLC, Addison, TX (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 16/10 (2006.01); G11C 16/34 (2006.01); G11C 16/04 (2006.01); G11C 16/08 (2006.01); H01L 27/11565 (2017.01); H01L 27/11556 (2017.01); H01L 27/11582 (2017.01); H01L 27/11519 (2017.01); G11C 16/26 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3459 (2013.01); G11C 16/0483 (2013.01); G11C 16/08 (2013.01); G11C 16/10 (2013.01); G11C 16/26 (2013.01); H01L 27/11519 (2013.01); H01L 27/11556 (2013.01); H01L 27/11565 (2013.01); H01L 27/11582 (2013.01);
Abstract

A memory apparatus and method of operation is provided. The apparatus includes memory cells coupled to a control circuit. The control circuit is configured to perform a first programming stage including iteratively programming each of the memory cells to first program states and verifying that the memory cells have a threshold voltage above one of a plurality of first verify voltages corresponding to the first program states. The first programming stage ends before all of the memory cells are verified thereby leaving a fraction of the memory cells below the one of the plurality of first verify voltages. The control circuit also performs a second programming stage including iteratively programming each of the memory cells to second program states and verifying that at least a predetermined number of the memory cells have the threshold voltage above one of a plurality of second verify voltages corresponding to the second program states.


Find Patent Forward Citations

Loading…