The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 08, 2022

Filed:

Dec. 12, 2017
Applicants:

Boe Technology Group Co., Ltd., Beijing, CN;

Chongqing Boe Optoelectronics Technology Co., Ltd., Chongqing, CN;

Inventors:

Xuebo Liang, Beijing, CN;

Xiuzhu Tang, Beijing, CN;

Qian Qian, Beijing, CN;

Shuai Chen, Beijing, CN;

Jingpeng Zhao, Beijing, CN;

Taoliang Tang, Beijing, CN;

Xing Dong, Beijing, CN;

Lijun Xiong, Beijing, CN;

Zhenguo Tian, Beijing, CN;

Shuang Hu, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01); G09G 3/20 (2006.01); G11C 19/28 (2006.01);
U.S. Cl.
CPC ...
G09G 3/2092 (2013.01); G11C 19/28 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/08 (2013.01);
Abstract

The present application discloses a shift-register circuit configured as one of a plurality of shift-register units cascaded in series. The shift-register circuit includes a pull-up sub-circuit coupled to a pull-up node, a first clock port, and an output port. The pull-up sub-circuit is configured to pass a first clock signal from the first clock port to the output port when the pull-up node is set to a turn-on voltage. Additionally, the shift-register circuit includes a chamfering sub-circuit coupled to the pull-up node, the first clock port, a chamfering clock port, and the output port. The chamfering sub-circuit is configured to pass a chamfering clock signal from the chamfering clock port to the output port. The chamfering clock signal is at the turn-on voltage simultaneously with the first clock signal and becomes a turn-off voltage slightly earlier in time than the first clock signal.


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