The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 08, 2022

Filed:

Nov. 13, 2019
Applicant:

Shanghai Huali Microelectronics Corporation, Shanghai, CN;

Inventors:

Xiao Chen, Shanghai, CN;

Jianye Song, Shanghai, CN;

Guangzhi He, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06T 7/00 (2017.01); G06T 19/20 (2011.01);
U.S. Cl.
CPC ...
G06T 7/001 (2013.01); G06T 19/20 (2013.01); G06T 2207/20056 (2013.01); G06T 2207/30148 (2013.01); G06T 2219/2016 (2013.01);
Abstract

The present invention provides a method and apparatus for analyzing a semiconductor wafer for analyzing a defect distribution pattern on a semiconductor wafer to be tested. The method comprises: obtaining a defect distribution map of the semiconductor wafer to be tested, the defect distribution map indicating a defect distribution within a surface of the semiconductor wafer to be tested; establishing a three-dimensional model to be tested according to the defect distribution map, wherein an XY plane of the three-dimensional model to be tested corresponds to the surface of the semiconductor wafer to be tested, and a Z-axis of the three-dimensional model to be tested corresponds to the number of defects in each grid unit in the XY plane.


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