The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 08, 2022

Filed:

Apr. 30, 2018
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Michael Karl Gschwind, Chappaqua, NY (US);

Valentina Salapura, Chappaqua, NY (US);

Chung-Lung K. Shum, Wappingers Falls, NY (US);

Timothy J. Slegel, Staatsburg, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/318 (2018.01); G06F 9/30 (2018.01); G06F 9/46 (2006.01); G06F 12/0875 (2016.01); G06F 9/38 (2018.01); G06F 12/0815 (2016.01); G06F 12/0811 (2016.01); G06F 12/0831 (2016.01);
U.S. Cl.
CPC ...
G06F 9/30181 (2013.01); G06F 9/3004 (2013.01); G06F 9/3005 (2013.01); G06F 9/30043 (2013.01); G06F 9/30076 (2013.01); G06F 9/30087 (2013.01); G06F 9/30145 (2013.01); G06F 9/3834 (2013.01); G06F 9/466 (2013.01); G06F 9/467 (2013.01); G06F 12/0815 (2013.01); G06F 12/0875 (2013.01); G06F 12/0811 (2013.01); G06F 12/0831 (2013.01); G06F 2212/452 (2013.01); G06F 2212/621 (2013.01);
Abstract

An instruction stream includes a transactional code region. The transactional code region includes a latent modification instruction (LMI), a next sequential instruction (NSI) following the LMI, and a set of target instructions following the NSI in program order. Each target instruction has an associated function, and the LMI at least partially specifies a substitute function for the associated function. A processor executes the LMI, the NSI, and at least one of the target instructions, employing the substitute function at least partially specified by the LMI. The LMI, the NSI, and the target instructions may be executed by the processor in sequential program order or out of order.


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