The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 01, 2022

Filed:

Mar. 11, 2021
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Thomas Kuenemund, Munich, DE;

Anton Huber, Taufkirchen, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/037 (2006.01); H03K 3/012 (2006.01); H03K 3/3562 (2006.01); H03K 3/356 (2006.01);
U.S. Cl.
CPC ...
H03K 3/0372 (2013.01); H03K 3/012 (2013.01); H03K 3/0375 (2013.01); H03K 3/35625 (2013.01); H03K 3/356008 (2013.01);
Abstract

A master-slave D flip-flop is disclosed having gates configured to supply two second intermediate signals as a function of first intermediate signals and a clock signal, and a slave circuit connected to a transfer circuit to form at least one output signal of the flip-flop from the second intermediate signals. The slave circuit is configured, when the second intermediate signals have, after a preceding pair of states, a predetermined pair of states, to maintain the at least one output signal as given by the preceding pair of states. The transfer circuit has a control input and is configured to generate the second intermediate signals to have the predetermined pair of states in response to a predetermined control signal state at the control input.


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