The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 01, 2022

Filed:

Jul. 09, 2020
Applicant:

Murata Manufacturing Co., Ltd., Kyoto, JP;

Inventors:

Tsutomu Kobori, Kyoto, JP;

Hiroshi Okabe, Kyoto, JP;

Shigeru Yoshida, Kyoto, JP;

Shingo Yanagihara, Kyoto, JP;

Yoshifumi Takahashi, Kyoto, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/64 (2006.01); H01L 27/06 (2006.01); H01L 23/66 (2006.01); H01L 29/10 (2006.01); H01L 29/737 (2006.01); H01L 49/02 (2006.01);
U.S. Cl.
CPC ...
H01L 23/66 (2013.01); H01L 23/64 (2013.01); H01L 27/0641 (2013.01); H01L 28/10 (2013.01); H01L 29/7371 (2013.01); H01L 2223/6655 (2013.01);
Abstract

A ground pad is disposed on a substrate. A plurality of transistors, each grounded at an emitter thereof, are in a first direction on a surface of the substrate. An input line connected to bases of the transistors is on the substrate. At least two shunt inductors are each connected at one end thereof to the input line and connected at the other end thereof to the ground pad. In the first direction, the two shunt inductors are on opposite sides of a center of a region where the transistors are arranged.


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