Non-volatile memory device including a verify circuit to control word and bit line voltages and method of operating the same

Abstract

A nonvolatile memory device includes a verify circuit, in a peripheral circuit region, controlling a verify operation by controlling a word line voltage applied to at least one unselected word line not to be programmed and a bit line voltage applied to a bit line connected differently from a voltage applied in a read operation. The at least one unselected word line includes a first word line located directly above a selected word line to be programmed and a second word line located directly below the selected word line. The verify circuit applies a word line voltage to the first word line and applies the same word line voltage to the second word line in the verify operation. The word line voltage has a different voltage level than a read voltage applied to the first word line and the second word line in a read operation.