The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 25, 2022

Filed:

Jun. 09, 2020
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Chandrasekhar S. Thyamagondlu, Sunnyvale, CA (US);

Darren Jue, Sunnyvale, CA (US);

Ravi Sunkavalli, San Jose, CA (US);

Akhil Krishnan, San Jose, CA (US);

Tao Yu, Campbell, CA (US);

Kushagra Sharma, Santa Clara, CA (US);

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/28 (2006.01); G06F 13/24 (2006.01);
U.S. Cl.
CPC ...
G06F 13/28 (2013.01); G06F 13/24 (2013.01);
Abstract

A direct memory access (DMA) system can include a memory configured to store a plurality of host profiles, a plurality of interfaces, wherein two or more of the plurality of interfaces correspond to different ones of a plurality of host processors, and a plurality of data engines coupled to the plurality of interfaces. The plurality of data engines are independently configurable to access different ones of the plurality of interfaces for different flows of a DMA operation based on the plurality of host profiles.


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