The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 25, 2022

Filed:

Mar. 12, 2019
Applicant:

Toshiba Memory Corporation, Minato-ku, JP;

Inventors:

Yuta Kumano, Kawasaki, JP;

Hironori Uchikawa, Fujisawa, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 11/10 (2006.01); H03M 13/15 (2006.01); H03M 13/29 (2006.01); G11C 29/52 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1068 (2013.01); G11C 29/52 (2013.01); H03M 13/1515 (2013.01); H03M 13/2906 (2013.01);
Abstract

According to one embodiment, a memory system includes a nonvolatile memory, and a memory controller. Each of first storage regions of each of the nonvolatile memory includes a plurality of second storage regions. Each of pieces of first data includes pieces of second data as storage target data. Third data includes pieces of the second data that are selected one by one from each of the pieces of first data. The memory controller executes first decoding of decoding each of the pieces of first data on the basis of a first error correcting code generated by using the first data, and executes second decoding of decoding the third data including a bit of which reliability, which relates to each bit in each of the second storage regions that fail in the first decoding, is less than reliability of other bits on the basis of a second error correcting code.


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