The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 25, 2022

Filed:

May. 14, 2018
Applicant:

Life Technologies Corporation, Carlsbad, CA (US);

Inventors:

Jarie Bolander, San Francisco, CA (US);

Keith Fife, Palo Alto, CA (US);

Mark Milgrew, Branford, CT (US);

Assignee:

Life Technologies Corporation, Carlsbad, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/26 (2020.01); G01R 31/28 (2006.01); G01N 27/414 (2006.01);
U.S. Cl.
CPC ...
G01R 31/2621 (2013.01); G01N 27/4148 (2013.01); G01R 31/2829 (2013.01); G01N 27/4145 (2013.01); H01L 2924/0002 (2013.01);
Abstract

The invention provides testing of a chemically-sensitive transistor device, such as an ISFET device, without exposing the device to liquids. In one embodiment, the invention performs a first test to calculate a resistance of the transistor. Based on the resistance, the invention performs a second test to transition the testing transistor among a plurality of modes. Based on corresponding measurements, a floating gate voltage is then calculated with little or no circuitry overhead. In another embodiment, the parasitic capacitance of at least either the source or drain is used to bias the floating gate of an ISFET. A driving voltage and biasing current are applied to exploit the parasitic capacitance to test the functionality of the transistor.


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