The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 18, 2022
Filed:
Jan. 31, 2020
The Board of Trustees of the University of Alabama, Tuscaloosa, AL (US);
Shuhui Li, Northport, AL (US);
Weizhen Dong, Tuscaloosa, AL (US);
Xingang Fu, Kingsville, TX (US);
Michael Howard Fairbank, Colchester, GB;
The Board of Trustees of The University of Alabama, Tuscaloosa, AL (US);
Abstract
A dc/dc buck converter controller comprises an artificial neural network (ANN) controller comprising an input layer and an output layer. The input layer receives an error value of a dc/dc buck converter and an integral of the error value. The output layer produces an output error voltage. A pulse-width-modulation (PWM) sliding mode controller (SMC) is configured to receive the output error voltage and produce a control action voltage by multiplying the output error voltage with a PWM gain. A drive circuit is configured to receive the control action voltage and provide a drive voltage to an input switch of the dc/dc buck converter. A PI control block is configured to modify a reference output voltage based on a maximum current constraint input. A locking circuit is configured to maintains the output error voltage at the saturation limit of the PWM SMC to manage a maximum duty cycle constraint.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile