The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 18, 2022

Filed:

Jun. 18, 2019
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Ashim Dutta, Menands, NY (US);

Chih-Chao Yang, Glenmont, NY (US);

Ekmini A. De Silva, Slingerlands, NY (US);

Dominik Metzler, Saratoga Springs, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 43/12 (2006.01); H01L 27/22 (2006.01); H01L 43/02 (2006.01);
U.S. Cl.
CPC ...
H01L 27/222 (2013.01); H01L 43/02 (2013.01); H01L 43/12 (2013.01);
Abstract

A method is presented for preventing excessive cap dielectric loss in memory areas and logic areas of a device. The method includes forming a first conductive line with top via and a conductive pad over a dielectric layer, wherein the conductive pad includes a microstud, depositing a dielectric cap in direct contact with the first conductive line and the conductive pad, and constructing a top electrode, a magnetic tunnel junction (MTJ) stack, and a bottom electrode in vertical alignment with the microstud of the conductive pad.


Find Patent Forward Citations

Dutta, Ashim. (2022). Mram integration with beol interconnect including top via (U.S. Patent No. 11227892). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11227892

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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