The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 18, 2022

Filed:

Oct. 17, 2019
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Sandeep Raj Bahl, Palo Alto, CA (US);

Paul Brohlin, Parker, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/66 (2006.01); H01L 29/66 (2006.01); G01R 31/26 (2020.01); H01L 29/20 (2006.01); H01L 29/778 (2006.01);
U.S. Cl.
CPC ...
H01L 22/20 (2013.01); G01R 31/2623 (2013.01); H01L 29/2003 (2013.01); H01L 29/66462 (2013.01); H01L 29/7786 (2013.01);
Abstract

One example includes a method for surge-testing a gallium nitride (GaN) transistor device-under-test (DUT) that includes at least one GaN transistor device. The method includes inserting the GaN transistor DUT into a test fixture comprising an inductor such that the inductor is coupled to the GaN transistor device to form a switching power regulator. The method also includes operating the switching power regulator at a DUT operating voltage to generate an output current through the inductor based on a DUT input voltage and a duty-cycle. The method also includes controlling an excitation voltage source to provide a voltage surge-strike to the GaN transistor DUT. The method also includes measuring the output current and the DUT input voltage at least one of during and after the voltage surge-strike. The method further includes storing the measured output current and the measured DUT input voltage in a memory to specify device characteristics of the GaN transistor DUT.


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