The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 18, 2022
Filed:
Jan. 11, 2018
Applicant:
Nxp B.v., Eindhoven, NL;
Inventors:
Hamidreza Hashempour, Eindhoven, NL;
Jos Verlinden, Wachtendonk, DE;
Ids Christiaan Keekstra, Nieuw-Amsterdam, NL;
Assignee:
NXP B.V., Eindhoven, NL;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/12 (2006.01); H03K 5/26 (2006.01); H03K 3/037 (2006.01); H03K 3/017 (2006.01); H03K 5/13 (2014.01); H03K 5/00 (2006.01);
U.S. Cl.
CPC ...
G06F 1/12 (2013.01); H03K 3/017 (2013.01); H03K 3/037 (2013.01); H03K 5/13 (2013.01); H03K 5/26 (2013.01); H03K 2005/00019 (2013.01);
Abstract
A clock delay circuit includes an output to provide an output clock signal which is a delayed version of an input clock signal. The clock delay circuit includes a latch whose output provides the output clock signal. A delay control circuit provides a third clock signal. The latch includes a first input to receive the input clock signal and a second input to receive the third clock signal. The amount of delay provided by the latch is dependent upon the duty cycle of the third clock signal.