The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 18, 2022

Filed:

Jul. 22, 2020
Applicant:

Sharp Kabushiki Kaisha, Sakai, JP;

Inventors:

Keisuke Yoshida, Sakai, JP;

Kohhei Tanaka, Sakai, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G02F 1/136 (2006.01); G02F 1/1362 (2006.01); G02F 1/1368 (2006.01); G02F 1/1333 (2006.01); G02F 1/1339 (2006.01); G02F 1/1335 (2006.01); G02F 1/1337 (2006.01);
U.S. Cl.
CPC ...
G02F 1/136286 (2013.01); G02F 1/1337 (2013.01); G02F 1/1368 (2013.01); G02F 1/13394 (2013.01); G02F 1/133345 (2013.01); G02F 1/133512 (2013.01); G02F 2202/10 (2013.01);
Abstract

A liquid crystal display device includes an active matrix substrate, a counter substrate, and a liquid crystal layer. The active matrix substrate includes a top gate type oxide semiconductor TFT a plurality of gate wiring lines a plurality of source and an interlayer insulating layer The counter substrate includes a plurality of columnar spacers provided on a second substrate. Each columnar spacer is disposed in an intersecting region where the gate wiring line and the source wiring line intersect. A front face of the active matrix substrate on the liquid crystal layer side includes a plurality of first ridges overlapping the plurality of gate wiring lines and a plurality of second ridges overlapping the plurality of source wiring lines.


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