The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 18, 2022

Filed:

Jun. 26, 2020
Applicant:

The Boeing Company, Chicago, IL (US);

Inventors:

Eric S. Mindock, Playa del Rey, CA (US);

James H. Mabe, Kirkwood, MO (US);

Frederick Theodore Calkins, Renton, WA (US);

Abraham Naroll Gissen, Brentwood, MO (US);

Miguel A. Estevez, Westchester, CA (US);

Assignee:

THE BOEING COMPANY, Chicago, IL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 7/20 (2006.01); B64G 1/50 (2006.01); F28D 21/00 (2006.01); H01L 23/427 (2006.01); H01L 23/42 (2006.01); F28F 13/00 (2006.01); H01L 23/373 (2006.01);
U.S. Cl.
CPC ...
B64G 1/506 (2013.01); F28D 21/00 (2013.01); F28F 13/00 (2013.01); H01L 23/3736 (2013.01); H01L 23/42 (2013.01); H01L 23/427 (2013.01); H05K 7/2049 (2013.01); H05K 7/20454 (2013.01); F28F 2013/008 (2013.01); F28F 2255/04 (2013.01);
Abstract

An apparatus includes a thermally conductive interface assembly including a first component associated with a first interface surface and a second component associated with a second interface surface. The apparatus also includes a shape memory alloy component coupled to the thermally conductive interface assembly and configured to move one or more components of the thermally conductive interface assembly between a first state and a second state based on a temperature of the shape memory alloy component. In the first state, the first interface surface is in physical contact with the second interface surface, and in the second state, a gap is defined between the first interface surface and the second interface surface.


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