The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 11, 2022

Filed:

Nov. 13, 2019
Applicant:

Marvell International Ltd., Hamilton, BM;

Inventors:

Ramya Krishna Devineni, Fremont, CA (US);

Donald Pannell, Cupertino, CA (US);

Hong Yu Chou, Saratoga, CA (US);

Samuel Kong, Cupertino, CA (US);

Assignee:

Marvell Asia Pte, Ltd., Singapore, SG;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04J 3/06 (2006.01); H04L 7/04 (2006.01); H04L 7/00 (2006.01);
U.S. Cl.
CPC ...
H04J 3/0661 (2013.01); H04J 3/0644 (2013.01); H04L 7/042 (2013.01); H04J 3/0635 (2013.01); H04J 3/0682 (2013.01); H04L 7/0037 (2013.01); H04L 7/04 (2013.01);
Abstract

A physical layer circuit includes registers and a timing circuit. The registers are configured to store a future time of day, a local hardware time and a compensation value. The timing circuit is configured to: determine a relationship between the local hardware time and a grandmaster time; select the future time of day; determine a difference between a local clock and a grandmaster clock and set the compensation value equal to the difference; subsequent to determining the difference, enable maintenance of a current time of day; when the local hardware time matches the future time of day, begin updating the current time of day based on the compensation value to match the grandmaster time; and adjust the compensation value to compensate for drift between the current time of day and the grandmaster time.


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