The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 11, 2022
Filed:
Feb. 12, 2020
Imec Usa Nanoelectronics Design Center, Inc., Kissimmee, FL (US);
Imec Vzw, Leuven, BE;
Aritra Banerjee, Orlando, FL (US);
Pierre Wambacq, Groot-Bijgaarden, BE;
IMEC USA NANOELECTRONICS DESIGN CENTER, Inc., Kissimmee, FL (US);
IMEC VZW, Leuven, BE;
Abstract
A power amplifier circuitry () comprises: a transistor stack () comprising at least two stacked transistor units (A,B,C) for amplifying input signals; wherein each stacked transistor unit (A,B,C) comprises a plurality of controllable segments (-to-N,-to-N,-to-N), each comprising a segment transistor (), wherein source terminals () within each transistor unit are connected, drain terminals () within each transistor unit are connected and gate terminals () within each transistor unit are connected, wherein each segment transistor () further comprises a back gate terminal () for setting a body bias, wherein at least two of the segment transistors () within each transistor unit have independently connected back gate terminals (); and a control unit () configured to control the body bias for selecting an amplifier class of each of the controllable segments (-to-N,-to-N,-to-N) of each of the stacked transistor units (A,B,C).