The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 11, 2022

Filed:

Sep. 28, 2020
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Jungkyu Chae, Seoul, KR;

Jinwoo Jeong, Suwon-si, KR;

Kwanyoung Chun, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/392 (2020.01); G06F 30/3312 (2020.01); H01L 29/06 (2006.01); G06F 119/12 (2020.01); H01L 29/786 (2006.01); G06F 119/18 (2020.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
G06F 30/392 (2020.01); G06F 30/3312 (2020.01); G06F 2119/12 (2020.01); G06F 2119/18 (2020.01); H01L 29/0673 (2013.01); H01L 29/42392 (2013.01); H01L 29/78696 (2013.01);
Abstract

A method of manufacturing an integrated circuit includes: generating layout data of the integrated circuit by placing and routing standard cells that define the integrated circuit, the standard cells including a nanosheet; generating timing analysis data by performing a timing analysis of the integrated circuit using the layout data; and regenerating the layout data of the integrated circuit by replacing and rerouting the standard cells that define the integrated circuit based on the timing analysis data and a shape of the nanosheet of the placed standard cells.


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Chae, Jungkyu. (2022). Method and computing system for manufacturing integrated circuit including nanosheet (U.S. Patent No. 11222158). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11222158

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