The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 11, 2022

Filed:

May. 31, 2017
Applicant:

Seagate Technology Llc, Fremont, CA (US);

Inventors:

Nitin Satishchandra Kabra, Mohammadwadi Pune, IN;

Jackson Ellis, Fort Collins, CO (US);

Niranjan Anant Pol, Erandwane Pune, IN;

Mark Ish, Castro Valley, CA (US);

Assignee:

Seagate Technology LLC, Fremont, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/0873 (2016.01); G06F 12/128 (2016.01); G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0873 (2013.01); G06F 12/0292 (2013.01); G06F 12/128 (2013.01); G06F 2212/1024 (2013.01); G06F 2212/217 (2013.01); G06F 2212/222 (2013.01);
Abstract

A hybrid storage device with three-level memory mapping is provided. An illustrative device comprises a primary storage device comprising a plurality of primary sub-blocks; a cache memory device comprising a plurality of cache sub-blocks implemented as a cache for the primary storage device; and a controller configured to map at least one portion of one or more primary sub-blocks of the primary storage device stored in the cache to a physical location in the cache memory device using at least one table identifying portions of the primary storage device that are cached in one or more of the cache sub-blocks of the cache memory device, wherein a size of the at least one table is independent of a capacity of the primary storage device.


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