The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 11, 2022
Filed:
Jun. 10, 2020
Western Digital Technologies, Inc., San Jose, CA (US);
Phil Reusswig, Santa Clara, CA (US);
Yosief Ataklti, Fremont, CA (US);
Western Digital Technologies, Inc., San Jose, CA (US);
Abstract
A memory controller includes, in one implementation, a host interface, a memory interface, and a flash translation layer (FTL). The FTL is configured to receive a request from a host device to store data in a zone of a solid-state memory. The FTL is also configured to determine a zone reset rate classification as one of a hot classification, a cold classification, and a normal classification. The FTL is further configured to allocate the zone to a memory die with the fewest free die blocks when the zone reset rate classification is the hot classification. The FTL is also configured to allocate the zone to a memory die with the most free die blocks when the zone reset rate classification is the cold classification. The FTL is further configured to send the data to the memory die for storage therein.