The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 11, 2022

Filed:

Mar. 19, 2020
Applicant:

Western Digital Technologies, Inc., San Jose, CA (US);

Inventors:

Jameer Mulani, Bangalore, IN;

Kapil Sundrani, Bangalore, IN;

Anindya Rai, Bangalore, IN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0619 (2013.01); G06F 3/064 (2013.01); G06F 3/065 (2013.01); G06F 3/0611 (2013.01); G06F 3/0655 (2013.01); G06F 3/0679 (2013.01); G06F 3/0688 (2013.01); G06F 12/0246 (2013.01); G06F 2212/7201 (2013.01);
Abstract

A memory system may include a volatile memory that is configured to store an address data structure that includes a plurality of logical-to-physical address entries. The address data structure may be stored across a plurality of bank groups of the volatile memory. A controller may be configured to store consecutive logical-to-physical address entries across different bank groups. In turn, during read and write operations for data sets associated with consecutive logical addresses, read requests for physical addresses where the data sets are stored may be sent to multiple bank groups and processed by the multiple banks in parallel.


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