The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 04, 2022

Filed:

May. 15, 2020
Applicant:

Alibaba Group Holding Limited, George Town, KY;

Inventors:

Jian Chen, San Jose, CA (US);

Ying Zhang, San Jose, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03M 13/00 (2006.01); H03M 13/09 (2006.01); G11C 29/52 (2006.01); G11C 29/42 (2006.01); G06F 11/10 (2006.01);
U.S. Cl.
CPC ...
H03M 13/095 (2013.01); G06F 11/1004 (2013.01); G06F 11/1068 (2013.01); G11C 29/42 (2013.01); G11C 29/52 (2013.01);
Abstract

One embodiment provides a system and method for facilitating error-correction protection in a storage device. In response to a write request, the system organizes a block of data in a two-dimensional (2D) array, forms a plurality of first-dimension sub-blocks by dividing the 2D array along a first dimension, and forms a plurality of second-dimension sub-blocks by dividing the 2D array along a second dimension. In response to determining that second-dimension error correction code (ECC) encoding is enabled, the system performs second-dimension ECC encoding on the second-dimension sub-blocks to generate a set of second-dimension ECC bits and performs first-dimension ECC encoding on the first-dimension sub-blocks and the second-dimension ECC bits to generate a set of first-dimension ECC bits. The system writes the data block along with the second-dimension ECC bits and the first-dimension ECC bits to the storage device. The data block and the second-dimension ECC bits are mapped to separate physical addresses in the storage device.


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