The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 04, 2022
Filed:
Oct. 29, 2020
Applicant:
Nxp B.v., Eindhoven, DE;
Inventors:
Ulrich Moehlmann, Moisburg, DE;
Lars Henrik Heinbockel, Moisburg, DE;
Torsten Gerhardt, Hamburg, DE;
Christian Scherner, Hamburg, DE;
Assignee:
NXP B.V., Eindhoven, NL;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/099 (2006.01); G01R 31/3187 (2006.01); H03L 7/093 (2006.01);
U.S. Cl.
CPC ...
H03L 7/0992 (2013.01); G01R 31/3187 (2013.01); H03L 7/093 (2013.01); H03L 2207/50 (2013.01);
Abstract
A built-in self-test (BIST) block is provided that is incorporated into an all-digital phase locked loop (ADPLL) located on chip with the ADPLL. The BIST performs testing functions without need for support external to the chip. Test setup, test control, and test evaluation are performed entirely on chip. The BIST provides information regarding success or failure of the testing and can provide error information regarding test cases that do not pass successfully.