The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 04, 2022
Filed:
Apr. 02, 2020
Sharp Kabushiki Kaisha, Sakai, JP;
SHARP KABUSHIKI KAISHA, Osaka, JP;
Abstract
A scanning antenna provided with an array of a plurality of antenna units includes a transmission and/or reception region including the plurality of antenna units, and a non-transmission and/or reception region other than the transmission and/or reception region. The scanning antenna includes a TFT substrate including a first dielectric substrate, a slot substrate including a second dielectric substrate and a slot electrode supported by a first main surface of the second dielectric substrate, a liquid crystal layer provided between the TFT substrate and the slot substrate, and a reflective conductive plate disposed facing a second main surface of the second dielectric substrate opposite to the first main surface with a dielectric layer interposed between the reflective conductive plate and the second main surface. Each of the plurality of antenna units includes a TFT supported by the first dielectric substrate, a patch electrode electrically connected to a drain of the TFT, and a slot formed in the slot electrode corresponding to the patch electrode. The slot substrate further includes a first insulating layer provided between the second dielectric substrate and the slot electrode. The slot electrode has a tensile stress and the first insulating layer has compressive stress. When viewed from a normal direction of the second dielectric substrate, a portion of the slot substrate that does not include the slot electrode includes at least one first region exposing the second dielectric substrate from the first insulating layer and/or at least one second region having a thickness of the first insulating layer that is less than a thickness of a portion of the first insulating layer overlapping the slot electrode. When viewed from the normal direction of the second dielectric substrate, the at least one first region or the at least one second region includes at least a portion of an end of the second dielectric substrate.