The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 04, 2022
Filed:
Jan. 16, 2020
SK Hynix Inc., Gyeonggi-do, KR;
Jeong-Yeop Lee, Gyeonggi-do, KR;
Dong-Su Park, Gyeonggi-do, KR;
Jong-Bum Park, Seoul, KR;
Sang-Do Lee, Gyeonggi-do, KR;
Jae-Min Lee, Seoul, KR;
Kee-Jeung Lee, Seoul, KR;
Jun-Soo Jang, Chungcheongbuk-do, KR;
SK hynix Inc., Gyeonngi-do, KR;
Abstract
A method for fabricating a semiconductor device includes: forming a mold stack pattern including a plurality of openings in an upper portion of a substrate and including a mold layer and a supporter layer which are stacked; forming a bottom electrode layer filling the plurality of the openings and covering the supporter layer; forming a filler portion disposed inside the plurality of the openings, a barrier portion extended upwardly from the filler portion, and an electrode cutting portion exposing a surface of the supporter layer by selectively etching the bottom electrode layer; forming a supporter by using the barrier portion as an etch barrier and etching the supporter layer exposed by the electrode cutting portion; selectively removing the barrier portion to form a hybrid pillar-type bottom electrode disposed inside the plurality of the openings; and removing the mold layer.