The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 04, 2022

Filed:

Apr. 26, 2019
Applicant:

C-sky Microsystems Co., Ltd., Zhejiang, CN;

Inventors:

Taotao Zhu, Hangzhou, CN;

Yubo Guo, Hangzhou, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/317 (2006.01); G06F 1/3203 (2019.01);
U.S. Cl.
CPC ...
G01R 31/31705 (2013.01); G01R 31/31701 (2013.01); G01R 31/31723 (2013.01); G06F 1/3203 (2013.01);
Abstract

The present disclosure provides a multi-core processor. The multi-core processor comprises a plurality of cores and a debug circuit, the debug circuit comprising debug circuits in the same number as that of the cores, transmission controllers in the same number as that of the cores, and a master control circuit, each of the debug circuits being connected to one core and one transmission controller, respectively, and all transmission controllers being connected to the master control circuit. Each of the debug circuits is configured to generate a debug event signal and respond to the generated debug event signal or received debug event signals generated by other debug circuits. Each of the transmission controllers is configured to respectively control transmission of the debug event signal between the respectively connected debug circuit and the master control circuit. The master control circuit is configured to forward debug event signals among different transmission controllers. The present disclosure can realize rapid configuration and control of debug event signal transmission, and at the same time lower power consumption of a debug circuit.


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