The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 28, 2021

Filed:

Jun. 18, 2020
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Jina Lee, Hwaseong-si, KR;

Hyungjoo Youn, Hwaseong-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/02 (2006.01); H01L 27/092 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/786 (2006.01); H01L 29/66 (2006.01); H01L 21/8234 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0207 (2013.01); H01L 21/02603 (2013.01); H01L 21/823412 (2013.01); H01L 21/823431 (2013.01); H01L 21/823475 (2013.01); H01L 21/823481 (2013.01); H01L 27/0924 (2013.01); H01L 29/0649 (2013.01); H01L 29/0673 (2013.01); H01L 29/42392 (2013.01); H01L 29/6681 (2013.01); H01L 29/66545 (2013.01); H01L 29/78696 (2013.01);
Abstract

An integrated circuit device includes a substrate having a first intellectual property (IP) core including a cell region and a first edge dummy region, fin-type active regions protruding from the cell region, dummy fin-type active regions protruding from the first edge dummy region, gate lines extending, over the cell region of the substrate, the gate lines including two adjacent gate lines spaced apart from each other with a first pitch and two adjacent gate lines spaced apart with a second pitch greater than the first pitch, dummy gate lines over the first edge dummy region of the substrate and equally spaced apart from each other with the first pitch.


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