The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 28, 2021

Filed:

Jan. 28, 2020
Applicant:

Sandisk Technologies Llc, Addison, TX (US);

Inventors:

Jee-Yeon Kim, San Jose, CA (US);

Yuki Mizutani, San Jose, CA (US);

Fumiaki Toyama, Cupertino, CA (US);

Assignee:

SANDISK TECHNOLOGIES LLC, Addison, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/18 (2006.01); H01L 23/48 (2006.01); H01L 25/00 (2006.01); H01L 27/06 (2006.01);
U.S. Cl.
CPC ...
H01L 25/18 (2013.01); H01L 23/481 (2013.01); H01L 25/50 (2013.01); H01L 27/0688 (2013.01);
Abstract

A bonded assembly includes a memory die containing a memory device and a plurality of bit lines, and logic die bonded to the memory die. The logic die contains a control circuit configured to control operation of the memory device. The control circuit contains a peripheral circuit region, a sense amplifier region, and a power and control signal region located adjacent to the sense amplifier region and containing at least one power and control signal interconnect structure which is configured to provide a power or control signal to or from the peripheral circuit region.


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