The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 28, 2021

Filed:

Jul. 22, 2019
Applicant:

Powerchip Semiconductor Manufacturing Corporation, Hsinchu, TW;

Inventors:

Wei-Yu Lin, Hsinchu, TW;

Shih-Hao Cheng, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01G 4/30 (2006.01); H05K 1/18 (2006.01); H01L 49/02 (2006.01); H05K 3/30 (2006.01);
U.S. Cl.
CPC ...
H01G 4/306 (2013.01); H01L 28/75 (2013.01); H01L 28/91 (2013.01); H01L 28/92 (2013.01); H05K 1/181 (2013.01); H05K 3/303 (2013.01); H05K 2201/10015 (2013.01); Y10T 29/43 (2015.01);
Abstract

A capacitor unit and a manufacturing method thereof are provided. The manufacturing method includes the following steps. An isolation layer is formed on a substrate. A first capacitor stacked structure and a second capacitor stacked structure are formed on the isolation layer. Electrode connectors are formed on the first capacitor stacked structure and the second capacitor stacked structure. The electrode connectors are exposed, so that the electrode connectors, the first capacitor stacked structure, the second capacitor stacked structure, the isolation layer, and the substrate are combined to form a capacitor integrated structure, wherein the isolation layer electrically isolates the substrate from the first capacitor stacked structure and the second capacitor stacked structure. The capacitor integrated structure is cut to form a first capacitor unit and a second capacitor unit separated from each other.


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