The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 28, 2021

Filed:

Feb. 27, 2020
Applicant:

Sandisk Technologies Llc, Addison, TX (US);

Inventors:

Piyush A. Dhotre, Milpitas, CA (US);

Sahil Sharma, San Jose, CA (US);

Niles Yang, San Jose, CA (US);

Phil Reusswig, San Jose, CA (US);

Assignee:

SanDisk Technologies LLC, Addison, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); G11C 16/34 (2006.01); G11C 16/10 (2006.01); G06F 9/54 (2006.01); G06F 9/30 (2018.01); G11C 16/26 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3454 (2013.01); G06F 9/30101 (2013.01); G06F 9/542 (2013.01); G11C 16/10 (2013.01); G11C 16/26 (2013.01);
Abstract

A memory apparatus and method of operation is provided. The apparatus includes a plurality of memory cells coupled to a control circuit. The control circuit is configured to receive data indicating a data state for each memory cell of a set of memory cells of the plurality of memory cells and program, in multiple programming loops, the set of memory cells according to the data indicating the data state for each memory cell of the set of memory cells. The control circuit is further configured to determine that the programming of the set of memory cells is in a last programming loop of the multiple programming loops and in response to the determination, receive data indicating a data state for each memory cell of another set of memory cells of the plurality of memory cells.


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