The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 28, 2021

Filed:

Jul. 02, 2020
Applicant:

SK Hynix Inc., Icheon-si, KR;

Inventors:

Geun Ho Choi, Icheon-si, KR;

Kyung Mook Kim, Icheon-si, KR;

Woongrae Kim, Icheon-si, KR;

Assignee:

SK hynix Inc., Icheon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/4096 (2006.01); G11C 11/408 (2006.01); G11C 11/4094 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4082 (2013.01); G11C 11/4087 (2013.01); G11C 11/4094 (2013.01); G11C 11/4096 (2013.01);
Abstract

A semiconductor device includes an internal column control signal generation circuit, a bank address transfer circuit, and a first bank control circuit. The internal column control signal generation circuit generates a column control signal to output an internal column control signal. The bank address transfer circuit receives a bank address to generate an inverted bank address and outputs the bank address and the inverted bank address. The first bank control circuit generates a first bank active signal based on at least one of the bank address and the inverted bank address and latches the first bank active signal based on the internal column control signal to generate a first bank column control signal.


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